Memory is one type of integrated circuitry and is used in electronic systems for storing data. Integrated memory is usually fabricated in one or more arrays of individual memory cells. The memory cells are configured to retain or store information in at least two different selectable states. In a binary system, the states are considered as either a “0” or a “1”. In other systems, at least some individual memory cells may be configured to store more than two levels or states of information.
Resistive random access memory (RRAM) is a class of memory that is of interest for utilization in existing and future data storage needs. RRAM utilizes programmable material having two or more stable states that differ in resistivity relative to one another. Example types of memory cells that may be utilized in RRAM are phase change memory (PCM) cells, programmable metallization cells (PMCs), conductive bridging random access memory (CBRAM) cells, nanobridge memory cells, electrolyte memory cells, binary oxide cells, and multilayer oxide cells (for instance, cells utilizing multivalent oxides). The memory cell types are not mutually exclusive. For example, CBRAM and PMC are overlapping classification sets.
PCM utilizes phase change material as a programmable material. Example phase change materials that may be utilized in PCM are chalcogenide materials.
The phase change material reversibly transforms from one phase to another through application of appropriate stimulus. Each phase may be utilized as a memory state, and thus an individual PCM cell may have two selectable memory states that correspond to two inducible phases of the phase change material.
A difficulty that may be encountered during utilization of PCM is described with reference to FIGS. 1 and 2. FIG. 1 shows a portion of a construction 500 comprising a PCM array. The array comprises memory cells 512-514, with each memory cell comprising phase change material 515.
The memory cells are between a bitline 520 and wordlines 522-524. The illustrated memory cells 512-514 are along a single column of the memory array, and accordingly are connected to a common bitline. The wordlines 522-524 extend in and out of the page relative to the cross-sectional view of FIG. 1, and may connect the illustrated memory cells with other memory cells (not shown) along rows of the memory array. Dashed lines are provided between the memory cells 512-514 and the bitline 520, as well as between the memory cells and the wordlines 522-524. Such dashed lines are utilized to indicate that there may be additional structures or materials between the bitline and the memory cells, as well as between the wordlines and the memory cells.
Electrically insulative material (not shown) is provided between the memory cells. The electrically insulative material may comprise a single composition or may comprise multiple different compositions.
Referring to FIG. 2, memory cell 513 may be selectively programmed through appropriate electrical stimulus along bitline 520 and wordline 523. Such programming may involve utilizing a heater material (not shown) to raise a temperature of programmable material 515 to at least about a transition temperature suitable to alter crystallinity within material 515. Such temperature raise creates a region 528 within the programmable material of memory cell 513 having altered physical properties, and thus transitions the memory cell to a different memory state than the adjacent memory cells 512 and 514.
A problem that may occur during the programming of memory cell 513 is thermal crosstalk between memory cell 513 and the adjacent memory cells 512 and 514. Arrows 529 are provided to diagrammatically illustrate thermal energy migrating outwardly from memory cell 513 during the programming of such memory cell. The thermal crosstalk may cause a so-called “program-disturb” phenomena in which data is lost from a memory cell during programming of a neighboring memory cell.
It would be desirable to alleviate or prevent thermal crosstalk between neighboring memory cells of PCM arrays.
The problem of thermal cross-talk may be present in other RRAM architectures besides PCM, and it would desirable to develop arrangements that could be incorporated into such other RRAM architectures to alleviate or prevent thermal crosstalk between neighboring memory cells.